CPS

Event-driven HIL simulation that replaces tiny fixed steps with switching-aware sampling and variable-order solvers (SCED/DHT, VTR-CHIL, DAT/SEO), enabling high-frequency, large-scale power electronics on commodity CPUs/MPSoCs.

Event-axis, synchronization-aware co-simulation that scales CHIL/PCCO from kW MMCs to MW-level converters by key-frame prediction, event-driven data rematching, and hybrid CPU–FPGA execution—boosting fidelity and easing real-time constraints.

Network-aware multi-agent RL that scales decentralized secondary voltage control by truncating critics to κ-hop neighborhoods with provable approximation guarantees; validated up to 114 DGs.